circuit note cn - 0268 circuits from the lab? reference circuits are engineered and tested for quick and easy system integration to help solve todays analog, mixed - signal, and rf design challenges. for more i nformation and/or support , visit www.analog.com/cn0268 . devices connected /referenced ADL5565 6 ghz ultrahigh dynamic range differential amplifier ad9467 16- bit, 200 msps/250 msps adc resonant approach to designing a band - pass filter for narrow - band, high i f, 16 - bit, 250 msps receiver front end rev. 0 circuits from the lab? circuits from analog devices have been designed and built by analog devices engineers. standard engineering practices have been employed in the design and construction of each circuit, and their function and performance have been tested and verified in a lab environment at room temperature. however, you are solely responsible for testing the circuit and determining its suitability and applicability for your use and application. accordingly, in no event shall analog devices be liable for direc t, indirect, special, incidental, consequential or punitive damages due to any cause whatsoever connected to the use of any circuits from the lab circuits. (continued on last page) one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ? 2012 analog devices, inc. all rights reserved. evaluation and desig n support design and integration files schematics, layout files, bill of materials circuit function and benefits the circuit shown in figure 1 is a 16 - bit, 250 msps , narrow - band , high if receiver front end with an optimum interface between the ADL5565 differential amplifier and the ad9467 adc. the ad9467 is a buffered input 16- bit, 200 msps or 250 msps adc with snr performance of approximately 75.5 dbfs and sfdr performance between 95 dbfs and 98 dbfs. the ADL5565 differential amplifier is suitable for driving if s ampling adcs because of its high input bandwidth, low distortion , and high output linearity. this circuit note describes a systematic procedure for designing the interface circuit and the antia liasing filter that maintains high performance and ensures minimal signal loss. a resonant approach is used to design a maximally flat butterworth fourth - order band - pass filter with a center frequency of 200 mhz . circuit description the advantages of usin g a differential amplifier to drive a high speed adc include signal gain, isolation, and source impedance matching to the adc . the ADL5565 allows pin - strappable gain adjustments of 6 db, 12 db, or 15.5 db. alt ernatively, by applying two external resistors to the inputs , finer gain steps can be achieved within the 0 db to 15.5 db range . additionally, the adl55 65 offers high output linearity, low distortion, low nois e, and wide input bandwidth. the 3 db bandwidth is 6 ghz , an d the 0.1 db flatness is 1 ghz. the ADL5565 is capable of achieving an output third - order intercept ( oip3 ) of greater than 50 db . 0.1f ADL5565 g = 6db 3.5pf 530 0.1f 33 33 1nf 1nf xfmr 1:1 z ect1-1-13m input z = 50 internal input z ad9467 16-bit 250msps adc 15 15 310 5.6 5.6 39nh 2pf vip2 vin2 5 5 +3.3v +1.8v vip1 vin1 z i = 200 +3.3v fs = 2v p-p diff 8.2pf 39nh 150nh 150nh 180nh 10560-001 figure 1. resonant filter design for narrow band high if applications using the ADL5565 differential amplifier and the ad9467 adc
cn-0268 circuit note re v. 0 | page 2 of 6 t o achieve th e optimal level of performance that the ADL5565 and ad9467 have to offer, it is important to properly follow the design guidelines as specified o n the respective d ata sheet s . some of the important design criteria include properly matching the input and output impedance of the ADL5565 for minimum signal loss and optimum linearity performance, systematic design of an antial iasing filter for improved dynamic ra nge, and source impedance matching to the adc inputs . ADL5565 input impedance matching 0.1f 0.1f ADL5565 vip2 vip1 vin1 vop von vin2 r6 r5 r4 r3 50? r2 r1 etc1-1-13 10560-002 figure 2. adl556 5 input impedance match figure 2 shows the recommended input matching network for the ADL5565 . the input impedance of the ADL5565 is ga in d ependent , and t he differential input impedance is 200 for 6 db gain, 100 for 12 db gain , and 67 for 15.5 db gain . to match the 50 source impedance of the signal generator to the input impedance of the ADL5565 , r1 and r2 must be chosen so that their sum in parallel with the input impedance of the ADL5565 , z i , is equal to 50 ? . to maintain balance in the differential circuit, r1 must equal r2 . the following formula ca n be u sed to calculate the necessary matching resistors . r1 = r2 2r1 || z l = 50 )/50(1 25 21 l z rr ? == table 1 shows the calculated termination resistors and pin configuration for the different gain settings of the ADL5565 . an alternative configuration to the one shown in figure 2 is to replace the 1:1 balun, etc1 -1- 13, with an impedance transformation rf transformer . this can eliminate the need for r1 and r2 . a 1:4 transformer can be used for the 6 db gain configuration or a 1:2 transformer for the 12 db gain configuration . the advantage s of this alternative configuration are lower component count and minimum signal loss . however, pay attention to the bandwidth of the transformer . impedance transformation transformers have narrower bandwidths and higher insertion loss as compared to a 1:1 balun. figure 2 shows a single - ended - to - differential approach to driving the ADL5565 using a balun or transformer . this configuration may not be a viable or desirable option in certain applications . the ADL5565 offers flexibility in its driver i nterface and can be driven single ended , as shown , or differentially with a differential mixer , for example . refer to the ADL5565 data sheet for details on the different input interfaces . ADL5565 output load matching the ADL5565 line arity performance has been optimized for a 200 output load . th is is a common output impedance used to interface to adcs and for filter design . with an optimized output load of 200 , the output ip3 of the adl 5565 at 200 mhz is 46 dbm . in situations where a 200 output load may not fit the application , tradeoff s can be made betwee n the output load of the ADL5565 and its linearity performance . figure 3 shows a plot o f third - order intermodulation ( imd3 ) vs . frequency for common ly used output loads. ?140 ?120 ?100 ?80 ?60 ?40 ?20 0 0 50 100 150 200 250 300 350 400 450 500 imd3 (dbc) frequenc y (mhz) 50 ? l oa d 100 ? loa d 200 ? loa d 400 ? loa d 10560-003 figure 3. ADL5565 imd3 vs. frequency for 50 ?, 100 ?, 200 ?, and 400 ? output load s, 3.3 v supply, gain = 6 db table 1 . gain, input impedance, and r1, r2, r3, r4, r5, and r6 values for ADL5565 gain db ADL5565 input impedance , l , r1 r2 r3 r4 r5 r6 6 200 33 33 open 0 0 open 12 100 50 50 0 open open 0 15.5 67 open open 0 0 0 0
circuit note cn-0268 rev. 0 | page 3 of 6 ad9467 source impedance the ad9467 is an ideal choice for an adc in this circuit because it is an if sampling adc optimized for high performance over wide bandwidths and ease of use . the ad9467 h as an integrated buffer that presents a fixed input impedance to the driver amplifier . this input structure is an advantage over adcs that u s e an unbuffered front end directly coupled to the sampling switches . unbuffered adcs present time varying input sam ple - and - hold impedances to the drive amplifier . the addition of the input buffer ease s the drive requirements at the expense of slightly higher power consumption . the buffered source impedance of the ad9467 is mo deled as a fixed impedance of a 530 resist ance in parallel with a 3.5 pf capacitance . when interfacing to the adc, it is recommended that the real input impedance be reduced from 530 to a lower value within the 200 to 400 range . by lowering the input impedance of the adc, the k ickback due to the sample- and - hold structure settles out faster, yielding improved linearity performance . the tradeoff is increase d input power because more power is required to drive the full scale of the adc . in this circuit example, the input impedance of the ad9467 was reduced to 200 to match the output impedance of the ADL5565 an d also to balance the linearity vs. input power of the adc . the input impedance of the ad9467 was reduced to 200 by placing a 310 resistor in parallel with the adc differential input . antialiasing filter design an antialising filter ahead of the adc help s reduce signal content and noise from unwanted nyquist zones that would otherwise alias in band and degrade the dynamic performance . antialiasing filters are often designed using lc networks and must have well defined source and load impedances to achieve the desired stop - band and pass - band characteristics . the filter design is accomplished usi ng software available from nuhertz technologies or agilent technologies advanced design systems (ads) , for example . in the circuit in figure 1 , the ads program was used to design a fourth - order maximally flat (butterworth) low - pa ss filter . figure 4 shows the low - pass filter design with a source and load impedance of 200 and a 3 db cutoff frequency of 300 mhz. the 200 impedance was chosen because it is the common source and load impedance of the driver amplifier and adc . the f irst elements are series inductor s to ease driver requirements . in the final optimized circuit of figure 1 , the filter source impedance is equal to approximately 21.6 ? ; however, 200 ? was chosen to desig n the low - pass portion of the filter because the overall filter is ultimately a resonant band - pass filter, and it is more critical that the amplifier and adc see the correct load and source impedance for optimized linearity performance. the effect of doing this is amplitude loss due to the impedance mismatch. 39 nh 2pf 8.2 pf 39 nh 150 nh 150 nh 10560-004 figure 4. low- pass filter design the low - pass filter design was fu rther tuned by creating resonance to cause peakin g at the band of interest . this resulted in a narrow - band, band - pass filter at a high if . p lacing an inductor across the adc differential inputs null s the input capacitance of the adc and creates peaking . figure 5 shows the calculation used to determine the resonant inductor value . in th e case of the 3.5 pf source impedance of the ad9467 , a parallel inductor of 181 nh is necessary to nul l the capacitive susceptance; leaving only the high impedance resistive portion of the rc parallel equivalen t. the resonant frequency chosen for the calculation was 200 mhz. z r z c z l 10560-005 figure 5 . resonant match c l yy z y z y ljz cj z lc l l c c l c 2 1 0 1 1 1 = =+ = = = = measured performance figure 1 shows the final c ircuit configuration . the outputs of the ADL5565 were padded with 5.6 on each output to improve the stability of the driver amplifier . the recommended series resistance is generally between a few ohms to several tens of ohms . a larger resistor value improve s on stability ; however , the tradeoff is a power l oss because the series resistor forms a voltage divider with the impedance at the adc input s, resulting in signal attenuation . following the series resistors at the output of the ADL5565 are 1 nf dc blocking capacitors . following that is the antialiasing filter and then the parallel resistor of 310 to reduce the input impedance of the adc . finally, the 15 resistors in series with the adc inputs isolate the internal switching transients from the filter and the amplifier .
cn-0268 circuit note re v. 0 | page 4 of 6 figure 6 and figure 7 shows the resul ting antialiasing filter response with a 1 db bandwidth of 41 mhz and a 3 db bandwidth of 89 mhz , centered at an if of 203 mhz . figure 8 shows the fft spectrum for the final receiver circuit of figure 1 , where the snr is 72.5 db fs , and the sfdr performance approaches 90 dbc. amplitude (db) 0 100 200 frequenc y (mhz) 300 400 ?14.286 ?8.571 ?2.857 2.857 8.571 14.286 ?20.000 20.000 10560-006 figure 6 . anti a liasing filter response, f c = 203 mhz ?3.5 ?3.0 ?2.5 ?2.0 ?1.5 ?1.0 ?0.5 0 120 140 160 180 200 220 240 amplitude (db) frequenc y (mhz) 1db bw = 41 mhz 3db bw = 89 mhz 10560-007 figure 7 . anti a liasing filter response , f c = 203 mhz , 1 db and 3 db bandwidth ?130 ?120 ?1 10 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 0 20 40 60 80 100 120 amplitude (dbfs) frequenc y (mhz) f in = 203 mhz f s = 245 . 76 mhz snr = 72 .5db s fdr = ?88 .9 db c h2/h3 = ?89 .1 db c/?88 .9 db c 10560-008 figure 8. single tone fft plot , input = 203 mhz , sampling rate = 245.76 msps using ads as a simulation tool , the filter components can be further tuned to shift the resonant peak to the desired if . for example, by changing the parallel 8.2 pf capaci tor of the antialiasing filter to 10 pf shifts the resonance peak lower to 180 mhz . figure 9 through figure 11 show the filter profile and single- tone fft performance for this condition . amplitude (db) 0 100 200 frequenc y (mhz) 300 400 ?14.286 ?8.571 ?2.857 2.857 8.571 14.286 ?20.000 20.000 10560-009 figure 9 . anti a liasing filter response, f c = 183 mhz ?3.5 ?3.0 ?2.5 ?2.0 ?1.5 ?1.0 ?0.5 0 100 120 140 160 180 200 220 240 amplitude (db) frequenc y (mhz) 10560-010 1db bw = 40mhz 3db bw = 75 mhz figure 10 . antialiasing filter response , f c = 183 mhz , 1 db and 3 db bandwidth ?130 ?120 ?1 10 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 0 20 40 60 80 100 120 amplitude (dbfs) frequenc y (mhz) f in = 183 mhz f s = 245 . 76 mhz snr = 73 db s fdr = ?91 db c h2/h3 = ?94 db c/?91 db c 10560-0 11 figure 11 . single tone fft plot , input = 183 mhz , sampling rate = 245.76 msps
circuit note cn-0268 rev. 0 | page 5 of 6 common variations quite a few combinations of drivers and high speed adcs are available ; however, for optimum performance , it is important to pay attention to the input and output impedance of the adc driver and the input reactance of the adc . e ach device has its own un ique impedance characteristic . a common variation to the figure 1 circuit is th e adl5562 (3.3 ghz bandwidth) driving the ad9467 with a low - pass , antialiasing filter design for wideband receiver applications , as described in circuit note cn - 0227 . similarly, circuit note cn - 0110 describes using the adl5562 differential driver amplifier to drive wide bandwidth adcs, such as the ad9445 , for high if ac - coupled app lications . a nother alternative where variable gain is desired, the ADL5565 can be replaced with the ad8375 variable gain amplifier . the ad8375 is a digitally controlled, variable gain, wide bandwidth amplifier that provides precise gain control across a broad 24 db gain range with 1 db resolution. the ad8376 is a dual version of the ad8375 . circuit note cn - 0002 describes how to use the ad8376 vga to drive wide bandwidth adcs for high if , ac - coupled applications. circuit evaluation and t est the circuit shown in figure 1 is implemented using the ad9467 evalua tion board ( ad9467 - 250ebz ). the bottom side of the ad9467 evaluation board includes the adl5562 and a prototyp e area for a fourth - order filter . the adl5562 was replaced with the ad l 5565 because both adc drivers are pin compatible . see user guide ug - 200 for the complete schematic s, bom, and layout for the ad9467 - 250ebz board. table 2 shows the modification s to the ad9467 evaluation board required to duplicate the circuit shown in figure 1 . complete documentation for this circuit note can be found in the cn - 0268 design su pport package located at : http://www.analog.com/cn0268- designsupport . this circuit uses the modified ad9467 - 250ebz circuit board and the hsc - adc - e va l c z f pga - based data capture board to run the tests . the two boards have mating high speed connectors , allowing for the quick setup and evaluation of the circuits performance. the modified ad9467 - 250ebz board contains the circuit evaluated as described in this note, and the hsc - adc - e va l c z data capture board is used in conjunction with visualana log evaluation software, as well as the spi c ontroller software to properly control the adc and capture the data. application note an - 835 contains complete details on how to set up the hardware and software to run the tests described in this circuit note. t able 2 . ad9467 evaluation board modification for the ADL5565 driver option reference desi gnator description manufacturer part number r121, r122, c109, c110, c117, r103, c116, r130, c118 dni r125, r110, r107, r113, r114, r119, r120 0 ? t103 balun, 1:1 impedance ratio m /a -c om maba - 007159- 000000 r105, r106 33 ? c101, c105, c106, c107 0 .1 f u100 ADL5565 analog devices r117, r118 5.6 ? c113, c114 1 nf l101, l102 39 nh coilcraft 0805cs c119 8.2 pf murata grm15 l103, l104 150 nh coilcraft 0805cs c120 2 pf murata grm15 l100 180 nh coilcraft 0805cs r111, r112 155 ? r127, r128 15 ?
cn-0268 circuit note re v. 0 | page 6 of 6 learn more cn - 0268 design support package: http://www.analog.com/cn- 0268 -designsupport ug - 200 u ser guide : evaluating the ad9467 16 - bit, 200 msps/250 msps adc , analog devices. cn - 0002 circuit note, using the ad8376 vga to dri ve wide bandwidth adcs for high if ac - coupled applications . analog devices cn - 0110 circuit note, using the adl5562 differential amplifier to drive wide bandwidth adcs for high if ac - coupled applications , analog devices cn - 0227 circuit note, high performance, 16 - bit, 250 msps wideband receiver with antialiasing fitler , analog devices. arrants , alex, brad brannon and rob reeder, an - 835 application note, understanding high speed adc testing and evaluation , analog devices . ardizzoni, john. a practical guide to high - speed printed - circuit - board layout , analog dialogue 39 - 09, september 2005. newman, eric and rob reeder. an - 827 application note, a resonant approach to interfacing amplifiers to switched - capacitor adcs . analog devices. reeder, rob. an - 742 application no te, frequency domain response of switched capacitor adcs . analog devices. mt - 031 tutorial, grounding data converters and solving the mystery of "agnd" and "dgnd." analog devices. mt - 073 tutorial, high speed variable gain amplifiers (vgas) . analog devices . mt - 075 tutorial, differential drivers for high speed adcs overview. analog devices. mt - 101 tutorial, decoupling techniques , analog devices. data sheets and evaluation boards ad9467 data sheet ADL5565 data sheet circuit evaluation board (ad9467 - 250ebz) standard data capture platform (hsc - adc - evalcz) revision history 4 /10 rev. 0 : initial version (continued from first page) circuits fr om the lab circuits are intended only for use with analog devices products and are the intellectual property of analog device s or its licensors. while you may use the circuits from the lab circuits in the design of your product, no other license is granted by implication or otherwise under any patents or other intellectual property by application or use of the circuits from the lab circuits. information furnished by analog devices is believed to be accurate and reliable. however, circuits from the lab circuits are supplied "as is" and without warranties of any kind, express, implied, or statutory including, but not limited to, any implied warranty of merchantability, noninfringement or fitness for a particular purpose and no responsibility is assumed by anal og devices for their use, nor for any infringements of patents or other rights of third parties that may result from their us e. analog devices reserves the right to change any circuits from the lab circuits at any time without notice but is under no obliga tion to do so. ? 2012 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. cn10560 -0- 4/12(0)
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